BUILD_DIR = ./build
BIN =../bin/non-output/riscv-tests/addi-riscv-tests.bin

SIM_TOP_V = $(BUILD_DIR)/SimTop.v
EMU = $(BUILD_DIR)/emu
verilog:
	mkdir -p $(BUILD_DIR)
	mill playground.runMain CPU.rv64_1stage.u_simtop

sim:
# 	$(MAKE) -C ./difftest EMU_CXX_EXTRA_FLAGS="-DFIRST_INST_ADDRESS=0x80000000" EMU_TRACE=1 emu
	$(MAKE) -C ./difftest EMU_CXX_EXTRA_FLAGS="-DFIRST_INST_ADDRESS=0x80000000" emu
	./build/emu -i $(BIN)

.DEFAULT_GOAL:= verilog

clean:
	-rm -rf $(BUILD_DIR)

.PHONY: test verilog help compile bsp reformat checkformat clean
